The present invention generally relates to the communication of electrical signals between different integrated circuit (IC) devices, or chips, in a data processing system. More specifically, the present invention provides a novel method of transmitting compatible electrical signals between chips which operate at different voltage levels by varying the impedance of a driver circuit with respect to an unterminated transmission line.
Complementary metal oxide semiconductor (CMOS) technology is advancing making circuitry smaller and reducing the power supply voltages needed for their operation. However, there are many chips in a computer system that may not use the newest CMOS technology. Therefore, it is necessary for a newer chip using, e.g. a 2.5 volt power supply to communicate with an older chip using, e.g. a 3.3 volt power supply. Typically, a single computer system may include multiple ones of these chips which operate at different voltage levels. The chips using newer technology generally operate at a lower voltage level than the older chips. In order to preserve compatibility, newer technology chips are often designed with multiple power supplies such that the voltage of the older chips can be matched. This is not an optimum solution since the newer ICs will have to include redundant power supplies which cause greater power consumption, use additional space on the chip and increase cost.
U.S. Pat. No. 3,959,665 shows a driving logic circuit with an interfacing means for making the driving logic compatible with a driven (receiver) circuit. This compatibility is provided by using a first DC power source and a second DC power source. U.S. Pat. No. 4,339,673 describes a driver circuit including a pair of variable reference voltages. More specifically two voltage sources V.sub.h and V.sub.l.
In conventional CMOS systems transmission lines are source terminated in order to ensure that no reflection occurs which will cause the driver voltage to be increased by the amount of the reflected signal (overshoot).
It can be seen that a need exists for a system which allows interconnection of chips using various voltage levels in a computer system, without the necessity of including multiple power supplies on the most recently designed chips to accommodate the voltages on all of the other connected chips in the computer system. Further, it is a difficult task for chip designers to try and anticipate which other ICs may be connected to the chip being designed in order to determine which additional power supplies must be included.